A Highly Power-Efficient Input-Boosted First Stage for Capacitively Coupled Chopper Instrumentation Amplifiers
This article presents a highly power-efficient capacitively coupled chopper instrumentation amplifier (CCIA) featuring an input-boosted first stage and leakage compensation circuits. To address the limitations of low-noise front-end amplifier design imposed by the physical constraints of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>m</roman></sub>/<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>d</roman></sub>, we proposed an input-boosted, inverter-based operational transconductance amplifier (OTA) scheme. This approach introduces a new perspective by doubling the signal-dependent voltage, effectively halving the input-referred noise (IRN) with the same supply current and voltage. Two prototypes were implemented in 180 and 22 nm CMOS processes, consuming 24 and 1.6 nW, respectively. To mitigate leakage current issues in the ultralow-power 22 nm prototype, compensation circuits are incorporated to address reverse-biased diode leakage and bulk leakage current. The 180 nm prototype achieves an IRN of 5.09 <roman xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">μV</roman><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>rms</roman></sub> within a 1.6 kHz bandwidth (BW), yielding a power efficiency factor (PEF) of 0.58. The 22 nm prototype achieves an IRN of 8.05 <roman xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">μV</roman><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>rms</roman></sub> within a 230 Hz BW, resulting in a PEF of 0.69. Measurements under varying temperatures validate the effectiveness of the leakage compensation circuits. The proposed input-boosted CCIA achieves the highest PEF among continuous-time amplifiers (CTAs), offering a general solution for power-efficient amplifier design.
Authors
- Jiajia Cui (ORCID: https://orcid.org/0009-0007-4110-2467)
- Jihang Gao (ORCID: https://orcid.org/0009-0000-7306-5428)
- Siyuan Ye (ORCID: https://orcid.org/0009-0006-9132-4570)
- Linxiao Shen (ORCID: https://orcid.org/0000-0001-7933-3673)
- Jie Li
- Xinhang Xu (ORCID: https://orcid.org/0009-0003-7381-5286)
- Yaohui Luan
Institutions
- Peking University (CN)
Publication Details
- Journal
- IEEE Journal of Solid-State Circuits
- Published
- 2025-05-06
- DOI
- https://doi.org/10.1109/jssc.2025.3564316
- Citations
- 2
- Primary Topic
- Sensor Technology and Measurement Systems
- Type
- article
- Field-Weighted Citation Impact
- 2.97
Funders
- National Natural Science Foundation of China