A One-Transistor DRAM Memory Cell Using HfO₂-Based Ferroelectric-Assisted Charge Trapping Concept

For the first time, we present a one-transistor dynamic random access memory (DRAM) cell using the ferroelectric polarization-assisted charge trapping phenomenon. The gate structure is TiN/Hf<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.5</roman></sub>Zr<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.5</roman></sub>O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>2</roman></sub>/SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>X</i></sub>/Si substrate. The spontaneous polarization of ferroelectric Hf<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.5</roman></sub>Zr<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.5</roman></sub>O is directed toward the substrate during programming and erasing operations. The purpose of introducing ferroelectric Hf<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.5</roman></sub>Zr<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.5</roman></sub>O<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>2</roman></sub> is to induce significant charge trapping. The device utilizes charge trapping for programming and detrapping for erasing. The proposed one-transistor DRAM (1T-DRAM) device shows fast write, latency-free reads, nondestructive readout, and excellent endurance characteristics (>10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>10</roman></sup>).