Design of Symmetric Three-Stage Doherty Power Amplifier Based on Piecewise Linear Current Profile

In this letter, piecewise linear current profile is introduced into the carrier amplifier of a symmetric three-stage Doherty power amplifier (TS-DPA) to extend the high-efficiency power range. According to the expected output back-off (OBO) range, the design parameters of the TS-DPA combiner are calculated based on the piecewise linear carrier current. Then the bandwidth of the proposed TS-DPA is analyzed and optimized through carefully selecting the combining load impedance. A symmetric TS-DPA operating in the 1.3–1.8-GHz frequency range is designed and fabricated to verify the proposed theory. The fabricated TS-DPA obtains drain efficiencies (DEs) of 41.6%–51.8% and 50.5%–58.4% at 11-dB OBO and saturation power levels, respectively. Moreover, a 40-MHz long-term evolution (LTE) modulated signal with a peak-to-average ratio (PAPR) of 9 dB is used to measure the fabricated DPA. The measured adjacent channel leakage ratios (ACLRs) at 1.4 and 1.7 GHz are below −47 dBc after digital predistortion (DPD).