Sorting it out in Hardware: A State-of-the-Art Survey
Sorting is a fundamental operation in various applications and a traditional research topic in computer science. Improving the performance of sorting operations can have a significant impact on many application domains. Much attention has been paid to hardware-based solutions for high-performance sorting. These are often realized with application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs). Recently, in-memory sorting solutions have also been proposed to address the movement cost issue between memory and processing units, also known as the Von Neumann bottleneck. Due to the complexity of the sorting algorithms, achieving an efficient hardware implementation for sorting data is challenging. A large body of prior solutions is built on compare-and-swap (CAS) units. These are categorized as comparison-based sorting. Some recent solutions offer comparison-free sorting. In this survey, we review the latest works in the area of hardware-based sorting. We also discuss the recent hardware solutions for partial and stream sorting. Finally, we discuss some important concerns that need to be considered in the future designs of sorting systems.
Authors
- M. Hassan Najafi (ORCID: https://orcid.org/0000-0002-4655-6229)
- Sercan Aygün (ORCID: https://orcid.org/0000-0002-4615-7914)
- Seyedeh Newsha Estiri (ORCID: https://orcid.org/0000-0001-5811-3655)
- Amir Hossein Jalilvand (ORCID: https://orcid.org/0000-0002-7641-6606)
- Faeze S. Banitaba (ORCID: https://orcid.org/0009-0004-8569-4423)
Institutions
- Case Western Reserve University (US)
- University of Louisiana at Lafayette (US)
Publication Details
- Journal
- ACM Transactions on Design Automation of Electronic Systems
- Published
- 2025-05-05
- DOI
- https://doi.org/10.1145/3734797
- Citations
- 8
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 18.16