Optimization of NIL and associated processes for the fabrication of advanced devices
Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. To establish a new lithographic production solution requires the support of an ecosystem in order to enable seamless insertion of the technology. Key elements of the ecosystem include mask fabrication, resists and post pattern transfer processes that follow imprinting. In this paper, we review the required ecosystem and then move on to discuss a variety of applications that can be addressed with NIL and show some processing examples.
Authors
- Takahiro Abe (ORCID: https://orcid.org/0000-0003-1251-7448)
- Ryuji Hamamoto (ORCID: https://orcid.org/0000-0002-2632-1334)
- Makoto Ogusu
- Hideki Kunugi
- Masahiro Tamura (ORCID: https://orcid.org/0000-0002-9721-304X)
- Takahiro Kitano
- Kiyohito Yamamoto
- Yusuke Yamamoto
- Tomohiro Saito
- Y. Nomura
- Keita Sakai
- Tomohito Yamaji
Institutions
- Tokyo Electron (Japan) (JP)
- Canon (Japan) (JP)
Publication Details
- Published
- 2025-05-06
- DOI
- https://doi.org/10.1117/12.3050873
- Primary Topic
- Manufacturing Process and Optimization
- Type
- article
- Field-Weighted Citation Impact
- 0.00