Single source switched capacitor boosting nine-level inverter for PV applications

• Presenting an innovative SCMLI topology with fewer switches, which improves the technical and financial advantages of the conventional H-bridge inverter. This creative design is a noteworthy accomplishment of the current work. • Creating an analytical mathematical model that makes the best use of capacitors to raise the load end voltage to the appropriate level. This approach guarantees effective resource use, which enhances the suggested system overall efficacy. • Using a real-time simulator to validate the outcomes of numerous tests on an interconnected system. A thorough comparison of the obtained results with those from more modern methods offers important insights into the effectiveness and superiority of the suggested methodology. Switched-Capacitor-Based Multilevel Inverters (SCMLIs) are evaluated using a "cost function" (CF) that takes into consideration important factors such the number of devices, total standing voltage (TSV), and source demands. In this study, a nine-level inverter is constructed to improve its boosting capabilities while minimizing its CF value and switch count. The proposed SCMLI uses a single DC source and two capacitors to achieve a voltage boosting of four. Peak Inverse Voltage (PIV) is lower than the output voltage peak amplitude for all working switches. Using a level-shifted pulse width modulation technique, the suggested architecture is examined. First, the performance of the suggested design is examined using MATLAB/Simulink simulations that allow for various kinds of parameter variations. It also takes into account the design of switching capacitors and the assessment of device power losses. PLECS software based thermal modelling is used to evaluate efficiency and power losses. The enhanced performance of the proposed structure in addressing key areas is demonstrated by a detailed comparative examination of existing topologies. Following that, hardware-in-loop (HIL) tests are carried out to validate the feasibility of the study and the functionality of the suggested topology.