An Efficient SI/PI Co-Optimization and Analysis Method for High-Speed Pin Arrays Design
To address the challenges of signal and power integrity in high-density interconnects, this paper presents a novel microwave analysis and intelligent optimization framework for high-speed link pin arrays design. A hybrid modal cascade (HMC) method incorporating the generalized T-matrix approach and the partial element equivalent circuit method is proposed to analyze the signal integrity of multi-layer structure with arbitrary shapes, which facilitates the rapid S-parameters calculation for trace-connected via arrays in advanced package. With the empirical formula of pin mutual inductance, a novel physics-assisted multi-objective genetic algorithm framework, designated as HMC-PMGA, is further introduced to optimize both pin arrangement and array parameters, ensuring compliance with both signal and power integrity requirements. Finally, results from various real-world high-speed link array configurations demonstrate the efficiency and reliability of the proposed algorithm, showing great potential for application in the electromagnetic integrity design of integrated circuits.
Authors
- Ruyi Song (ORCID: https://orcid.org/0009-0009-9364-5708)
- Er‐Ping Li (ORCID: https://orcid.org/0000-0002-5006-7399)
- Da Li (ORCID: https://orcid.org/0000-0002-1107-6815)
- Ling Zhang (ORCID: https://orcid.org/0000-0001-8206-3408)
- Ruifeng Xu (ORCID: https://orcid.org/0009-0000-4425-0763)
- Hongchao Wang (ORCID: https://orcid.org/0000-0001-7905-2513)
Institutions
- Advanced Micro Devices (United States) (US)
- Geely (China) (CN)
- Zhejiang University (CN)
Publication Details
- Journal
- IEEE Transactions on Components Packaging and Manufacturing Technology
- Published
- 2025-05-02
- DOI
- https://doi.org/10.1109/tcpmt.2025.3566074
- Primary Topic
- Gear and Bearing Dynamics Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China