False Turn-on Failure and Protection of p-gate GaN HEMT in MHz Class-E Resonant Inverter

Featuring simple structure and natural soft-switching, the single-switch resonant power inverters usually operate at several MHz frequency. However, gate-node voltage rings caused by parasitic inductors challenge the device security and limit the operating voltage. To address this problem, this paper investigates the mechanism and protection of the false turn-on (FTN) problem as the p-gate gallium nitride (GaN) HEMT turning off. After FTN, the gate-control capability losses and source-node shows large leakage. Two important causes of gate-node voltage ring are high dv/dt noise on drain-node, resonance between device junction capacitors and parasitic inductors. Through circuit modelling, parameter design and experimental verification, reducing the Miller current amplitude in the gate-to-drain capacitor (CGD) can suppress the gate-node voltage ring, by using external small passive LC network.

Authors

Institutions

Publication Details

Published
2025-03-16
DOI
https://doi.org/10.1109/apec48143.2025.10977431
Primary Topic
GaN-based semiconductor devices and materials
Type
article
Field-Weighted Citation Impact
0.00

Funders

Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

False Turn-on Failure and Protection of p-gate GaN HEMT in MHz Class-E Resonant Inverter

Jiayin He, Ju Gao, Ziheng Liu, Hong‐Jie Peng et al.
GaN-based semiconductor devices and materials
article

False Turn-on Failure and Protection of p-gate GaN HEMT in MHz Class-E Resonant Inverter

Jiayin He, Ju Gao, Ziheng Liu, Hong‐Jie Peng, Jinyan Wang, Maojun Wang
article en

Abstract

Featuring simple structure and natural soft-switching, the single-switch resonant power inverters usually operate at several MHz frequency. However, gate-node voltage rings caused by parasitic inductors challenge the device security and limit the operating voltage. To address this problem, this paper investigates the mechanism and protection of the false turn-on (FTN) problem as the p-gate gallium nitride (GaN) HEMT turning off. After FTN, the gate-control capability losses and source-node shows large leakage. Two important causes of gate-node voltage ring are high dv/dt noise on drain-node, resonance between device junction capacitors and parasitic inductors. Through circuit modelling, parameter design and experimental verification, reducing the Miller current amplitude in the gate-to-drain capacitor (CGD) can suppress the gate-node voltage ring, by using external small passive LC network.

Peking University (CN)
National Natural Science Foundation of China, National Key Research and Development Program of China
Affordable and clean energy
Openalex Percentile: Top 95%
GaN-based semiconductor devices and materials
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.