A 7 bit 5 A 6.7 GHz Gate-Shaping Digital Gate Driver with Burst-Sampling ADC for Iterative Switching Optimization of SiC Power MOSFETs

Wide bandgap semiconductors provide the potential to significantly increase the efficiency of today’s power electronics while simultaneously their superior characteristics regarding dV/dt and dI/dt pose a challenge to EMI and EMC. Through shaping the waveform driving the HV power semiconductor the challenging figures of EMI and EMC can be significantly improved while achieving a high efficiency. This work presents a gate-shaping digital gate driver for reducing EMI and optimizing the switching behavior of HV SiC power-MOSFETs. It includes a 7 bit 5 A 6.7 GHz driver unit with a tunable current resolution of up to 40 mA and larger steps of 160 mA and a time resolution of up to 150 ps. For iteratively closing the loop driving the SiC power-MOSFET it contains a burst-sampling ADC with a sampling rate of up to 1.66 MS s<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−1</sup>. Further, it includes a separate dead-time control circuit, an 8-phase 832 MHz clock generation and a 0.4 W PMU supplying the digital gate driver with the appropriate clock frequency phases and voltage levels of 5 V and 1.8 V.