A Scalable Dual-Orthogonal-Cooling Packaging Concept for Parallel-Series SiC Chips

Conventional high-frequency SiC power modules with isolated substrates typically bond the SiC dies directly onto the substrates. Although effective for parallel die configurations and simple package topologies, this design becomes limiting for high-voltage, high-current modules that require parallel-series die connections in the package and complex topologies. This paper introduces a novel dual-orthogonal-cooling (DOC) packaging concept that positions the dies perpendicularly to the substrate using a proposed switch bar structure. The switch bars are designed to conduct high currents horizontally; confine power loops within the ceramic layer of the top substrate and external decoupling capacitors; segment voltage stresses to limit maximum E-field and dv/dt; and spread heat to enable DOC through dual-sided heat dissipation. The new design reduces the package footprint and features high scalability to accommodate various power ratings and topologies. The proposed DOC packaging concept has been validated through FEA simulations, demonstrating reduced power-loop inductance, mitigated E-field near triple points, and enhanced thermal performance. Finally, a mechanical prototype with 2-parallel-4-series dies was fabricated to assess the manufacturability and identify manufacturing challenges.