Device-Simulation-Based Machine Learning Technique and Performance Optimization of NSFET

With the rapid growth of the semiconductor industry, it is clear that device simulation has been considered as slow process. As a result of semiconductor device downscaling, obtaining the inevitable device simulation data is significantly more expensive because it requires complex analysis of multiple factors. Using Machine Learning (ML) techniques to device modeling is promising, as their combination will lead to great outcomes in the semiconductor industry. Nanosheet Field Effect Transistor (NSFET) is a promising device for high-performance integrated circuits due to their superior electrical control and reduced short-channel effects. This paper presents a ML based Nanosheet Field Effect Transistor modeling. In traditional Technology Computer-Aided Design (TCAD) simulation, at once only a single simulation of NSFET for fixed length, width and thickness can be done, for change in any of the input parameter again simulation has to be done. To overcome this, simultaneous changes in input parameters are predicted using machine learning. The length, width, and thickness of the dielectric layer are input parameters and the drain current is the output parameter for the ML-based device model for NSFET. Experimental results have shown that our ML-based model can predict drain current accurately. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{R}^{2}$</tex> -value is found be around 0.99832. The highest <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{I}_{\text{ON}}/\mathrm{I}_{\text{OFF}}$</tex> ratio, very high ON current (ION), very low OFF current (IOFF) is achieved for NSFET. The primary goal of this work is to explore the possibility of ML model that can replace the device simulation to reduce the computational cost and drive energy-efficient devices.

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Published
2024-12-12
DOI
https://doi.org/10.1109/ocit65031.2024.00073
Citations
1
Primary Topic
Digital Transformation in Industry
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article
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0.35
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Device-Simulation-Based Machine Learning Technique and Performance Optimization of NSFET

B. Sandhya, Ummadisetti Gowthami, Sanjay Kumar, Patta Supraja et al.
1 citations
Digital Transformation in Industry
0.35
article

Device-Simulation-Based Machine Learning Technique and Performance Optimization of NSFET

B. Sandhya, Ummadisetti Gowthami, Sanjay Kumar, Patta Supraja, M. Durga Prakash
article en
1 citations

Abstract

With the rapid growth of the semiconductor industry, it is clear that device simulation has been considered as slow process. As a result of semiconductor device downscaling, obtaining the inevitable device simulation data is significantly more expensive because it requires complex analysis of multiple factors. Using Machine Learning (ML) techniques to device modeling is promising, as their combination will lead to great outcomes in the semiconductor industry. Nanosheet Field Effect Transistor (NSFET) is a promising device for high-performance integrated circuits due to their superior electrical control and reduced short-channel effects. This paper presents a ML based Nanosheet Field Effect Transistor modeling. In traditional Technology Computer-Aided Design (TCAD) simulation, at once only a single simulation of NSFET for fixed length, width and thickness can be done, for change in any of the input parameter again simulation has to be done. To overcome this, simultaneous changes in input parameters are predicted using machine learning. The length, width, and thickness of the dielectric layer are input parameters and the drain current is the output parameter for the ML-based device model for NSFET. Experimental results have shown that our ML-based model can predict drain current accurately. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{R}^{2}$</tex> -value is found be around 0.99832. The highest <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{I}_{\text{ON}}/\mathrm{I}_{\text{OFF}}$</tex> ratio, very high ON current (ION), very low OFF current (IOFF) is achieved for NSFET. The primary goal of this work is to explore the possibility of ML model that can replace the device simulation to reduce the computational cost and drive energy-efficient devices.

SRM University (IN)
Openalex Percentile: Top 30%
Digital Transformation in Industry
0.35
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Device-Simulation-Based Machine Learning Technique and Performance Optimization of NSFET — B. Sandhya, Ummadisetti Gowthami, et al. · (2024) | TGRS Research Map | TGRS