Closed-Form Capacitance Network Compact Model and Monte Carlo Analysis of the GIDL-Assisted Potential Growth in 3-D NAND Flash String

This study proposes new physics-based terminal capacitance models derived from the select gate (SG) channel potential in the gate-induced drain leakage (GIDL)-assisted 3-D NAND Flash string. These models accurately predict the transient behavior of the string across various SG voltage (VSG) ramps, showing good agreement with computer-aided design (TCAD) simulation results. Their closed-form solutions eliminate iterative calculations, ensuring Simulation Program with Integrated Circuit Emphasis (SPICE) compatibility and enabling Monte-Carlo (MC) simulations that account for various process variations and voltage ramp conditions. This approach provides critical insights into optimizing GIDL-assisted erase performance, advancing both the reliability and efficiency of next-generation 3-D NAND Flash memory.