Dual-Mode Analog Counter With Precise Step Regulation and Successive Approximate Calibration Circuit for SPAD Image Sensors

This paper reports a dual-mode analog counter for Single Photon Avalanche Diode (SPAD)-based image sensors. With the proposed comparator feedback scheme, the precise counting step size configuration is achieved. Cascade counting mode and up/down counting mode are also supported. Additionally, a successive approximation (SA) type calibration method is also proposed to enhance the process, voltage, temperature (PVT) robustness of up/down counting step. With the calibration method, the analog counter in up/down counting mode supports adjusting the step of arrayed analog counters with a master-slave approach and this functionality has been validated through four slave counters. This dual-mode analog counter is fabricated in 180-nm CMOS process and primarily comprises two counting modules (up and down). In each counting module: the dynamic range is 10 bits with the step of 1.3 mV, the area is 79.25 μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> without storage capacitor, and the power consumption is 108.3 nW. The area of SA calibration circuit and four slave-counters is about 350 μm × 255 μm.