Performance Evaluation of Various Multicarrier Pulse Width Modulation Techniques for Seven-level Packed U-Cell Multilevel Inverter with a Novel Switching Generating Method

In this paper, a novel switching generation method is presented that adapts conventional pulse width modulation (PWM) methods to the packed U-cell multilevel inverter topology. The proposed solution involves designing a combinational logic circuit constructed using minterms. By selecting and summing appropriate minterms, the resulting output signal is used to drive the power semiconductors. Additionally, various multicarrier PWM methods are analyzed and compared based on performance metrics such as output current harmonics, DC bus utilization, and semiconductor losses. Numerical studies are conducted in MATLAB on a single-phase 324 kVA, seven-level PUC-MLI using an improved semiconductor loss estimation approach that employs higher-order loss curves for both IGBT and diode, derived from the manufacturer's data sheet. When compared to level-shifted PWM, phase-shifted PWM (PS-PWM) consistently achieves lower current THD, even at low carrier frequencies, and always maintaints THD within the limits of the IEEE-519 power quality standard. It is also shown that the PS-PWM method results in approximately 3.3 times higher semiconductor losses on average than level-shifted PWM methods. Across all PWM methods, the carrier frequency has a negligible effect on the fundamental component of the output voltage, which remains below 1V. Furthermore, when comparing the PS-PWM method as a whole to level-shifted PWM methods, DC voltage variations of up to 0.5% are observed at the output for a given modulation index. The simulation results indicate that while level-shifted PWM methods generate lower semiconductor losses, the phase-shifted PWM option provides better power quality.