Thermal Optimization of Microprocessor Chip Used in Power Electronics Devices with Machine Learning Techniques
This research aims to bridge the existing knowledge gap in microprocessor chip binning based on performance by applying the machine learning (ML) techniques. The concept of performance binning is examined, where units undergo thorough testing to categorize them according to factors such as Vmin and frequency. Performance binning ensures that units with similar performance traits are grouped together, streamlining quality assurance and optimizing production processes. By integrating machine learning into the binning process of microprocessor chip units, potential benefits include reduced burn-in, shorter testing times, and minimized thermal stresses on the chips which help for thermal optimization of the chip. Notably, employing linear regression reveals a maximum percentage variation of 2.45% for high frequency. These advancements not only optimize production but also have a significant impact on chip performance. Specifically, minimizing thermal stresses and excess voltage enhances chip reliability, energy efficiency, and operational longevity. The proposed model, utilizing linear regression for binning, demonstrates resilience by reducing excess voltage and optimizing the production process.
Authors
- Madhuri A. Chaudhari (ORCID: https://orcid.org/0000-0001-5500-6723)
- Nilkanth B. Chopade (ORCID: https://orcid.org/0000-0001-5736-2713)
- Rohit Kumar (ORCID: https://orcid.org/0000-0001-8872-7295)
Institutions
- Visvesvaraya National Institute of Technology (IN)
Publication Details
- Published
- 2025-02-28
- DOI
- https://doi.org/10.1109/ssdee64538.2025.10968773
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00