FinFET Technology Based Development of Energy Efficient Datapath System

In today's electronics industry, extensive research is dedicated to advancing nanoscale VLSI designs, particularly focusing on energy-efficient solutions. N anoscale designs often exhibit elevated power consumption due to the close proximity of source and drain regions within these diminutive devices. The limited channel space between source and drain weakens channel control, resulting in increased leakage currents. The FinFET device emerges as a prime candidate for contemporary electronic circuits, offering enhanced performance. This study is centered on the implementation of FinFET technology-based data paths, emphasizing low-power and high-speed capabilities. The data path assumes a crucial role in executing logical and arithmetic operations within the system, encompassing essential functions like NOT, AND, OR, and more. A 4-bit carry-look-ahead adder is employed for bitwise arithmetic tasks such as addition, subtraction, increment, and decrement. The designs are realized using the L T -Spice simulator, showcasing notable achievements. The proposed design significantly reduces power consumption, cutting the propagation delay by 9 µsee compared to CMOS technology, which consumed 4.7 µW. The findings strongly indicate that FinFET-based data paths outperform bulk CMOS technology, reinforcing their potential for superior performance and energy efficiency.