FPGA-based image signal processing CEPST module design
CEPST algorithm is an important step in image processing, which is widely used in computer vision, pattern recognition, and machine learning. In order to improve the efficiency and performance of CEPST algorithm, more and more studies have implemented the task of CEPST algorithm on FPGA boards in recent years. FPGA boards offer parallel computing capabilities, low power consumption, and low latency, making them suitable for high-performance computing and real-time applications. In this paper, the Vivado tool is used to implement the method of CEPST algorithm. Vivado has a complete toolchain and debugging environment, supports a variety of hardware description languages, and provides a rich set of IP cores and acceleration libraries to facilitate FPGA design and development. This paper details the steps of CEPST algorithm using Vivado, from algorithm design to simulation. The CEPST algorithm was designed to improve the accuracy and speed, and further improve the performance of the overall system.
Authors
- X D Wang
- Wuyang Xue (ORCID: https://orcid.org/0000-0002-7284-0629)
- Huan Ma (ORCID: https://orcid.org/0000-0002-3206-2324)
- Chin Ta Chen
- Liqun Tang (ORCID: https://orcid.org/0000-0001-6037-1733)
- C. C. Yang (ORCID: https://orcid.org/0000-0002-3476-3802)
- L. s. Tsai
Institutions
- Zhaoqing University (CN)
Publication Details
- Published
- 2025-04-25
- DOI
- https://doi.org/10.1117/12.3059932
- Primary Topic
- CCD and CMOS Imaging Sensors
- Type
- article
- Field-Weighted Citation Impact
- 0.00