Backside patterning process enablement and its challenges for driving Moore's Law

With Initial Intel report on Back Side Power Delivery using PowerVia in 2023 and its commitment for deployment in Intel products in 2025 has driving rapid expansion of R&D to enable deployment across the semiconductor Industry. This Intel innovation helps in delivering tighter Cell Height (CH) with simpler process, cost and better interconnect performance. In this talk, we will discuss the process challenges , patterning and process enablement needed for driving advancement of these feature in GAA architecture scaling.