Power-Efficient Approximate 8 by 8 Vedic Multiplier Based DCT Block for JPEG Compression

This paper presents a power-efficient 8 by 8 Approximate Vedic Multiplier based on the Urdhva Tiryakbhyam Sutra and an approximate DCT block. The proposed multiplier achieves a 54 percent reduction in power consumption compared to a conventional Vedic multiplier and has a lower error rate of 49.56 percent than existing approximate multipliers. The approximate DCT block operates at a higher frequency of 166.7 MHz. JPEG compression using the proposed approximate DCT block reduces computation time compared to the accurate JPEG compressor while maintaining comparable results, with an SSIM of 0.886, a PSNR of 31.89 dB, and a compression ratio of 1.69×. These results demonstrate the effectiveness of the proposed design in achieving energy-efficient, high-speed image compression while preserving visual quality.