Low-Power CMOS Inverter Using Homogeneous Monolayer WSe₂ Channel With Polarity Control

While performance metrics of innovative technology-nodes continue to improve rapidly, energy efficiency has not kept pace. In this work, we successfully constructed a homogeneous CMOS inverter using monolayer tungsten diselenide (WSe<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>), a promising candidate can maintain good mobility at atomic-level thickness and offers better resistance to short-channel effects. Through different contact engineering and passivation doping approaches, the polarity of WSe<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> could be effectively tailored. These module improvements are helpful to investigate the impact on threshold voltage of several critical process steps and match performance of both n and p-type field-effect transistors with low effective oxide thickness back-gate dielectrics in enhancement-mode operation. In addition, the inverters demonstrate superior performance at a relevant supply voltage (VDD) of 1.5 V: voltage gain exceeding 10 V/V, noise margin over 80%, picowatt-range static-power consumption, and near-ideal switching voltage of half-VDD. Reaching these numbers simultaneously opens up the possibilities for future-generation applications of two-dimensional material-based electronic components.

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Publication Details

Journal
IEEE Electron Device Letters
Published
2025-04-24
DOI
https://doi.org/10.1109/led.2025.3564164
Citations
1
Primary Topic
2D Materials and Applications
Type
article
Field-Weighted Citation Impact
0.52

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article

Low-Power CMOS Inverter Using Homogeneous Monolayer WSe₂ Channel With Polarity Control

Chih‐I Wu, I‐Chih Ni, Sui-An Chou, Ang‐Sheng Chou et al.
1 citations
IEEE Electron Device Letters
2D Materials and Applications
0.52
article

Low-Power CMOS Inverter Using Homogeneous Monolayer WSe₂ Channel With Polarity Control

Chih‐I Wu, I‐Chih Ni, Sui-An Chou, Ang‐Sheng Chou, Yu-Tung Lin, Ta-Wei Hsu, Ming-Han Chang, Ching-Hao Hsu, Zheng-Da Huang, Fa-Rong Hou, Li-An Chiu
article en
1 citations

Abstract

While performance metrics of innovative technology-nodes continue to improve rapidly, energy efficiency has not kept pace. In this work, we successfully constructed a homogeneous CMOS inverter using monolayer tungsten diselenide (WSe<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub>), a promising candidate can maintain good mobility at atomic-level thickness and offers better resistance to short-channel effects. Through different contact engineering and passivation doping approaches, the polarity of WSe<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> could be effectively tailored. These module improvements are helpful to investigate the impact on threshold voltage of several critical process steps and match performance of both n and p-type field-effect transistors with low effective oxide thickness back-gate dielectrics in enhancement-mode operation. In addition, the inverters demonstrate superior performance at a relevant supply voltage (VDD) of 1.5 V: voltage gain exceeding 10 V/V, noise margin over 80%, picowatt-range static-power consumption, and near-ideal switching voltage of half-VDD. Reaching these numbers simultaneously opens up the possibilities for future-generation applications of two-dimensional material-based electronic components.

IEEE Electron Device LettersVol. 46(7)
National Taiwan University (TW), National Tsing Hua University (TW), Taiwan Semiconductor Manufacturing Company (Taiwan) (TW)
Ministry of Science and Technology, Taiwan
Affordable and clean energy
Openalex Percentile: Top 39%
2D Materials and Applications
0.52
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