Operation of junctionless nanowire transistors down to 4.2 Kelvin

• Junctionless nanowire transistors (JNT) characterized from room temperature down to liquid-helium temperatures. • This work fills in the gap for cryogenic operation of JNTs, which is widely scarce, with publications in very early masks. • Devices with channel length of 20 nm at 4.2K show subthreshold slope and threshold voltage comparable to 100nm-long devices. • Improved performance of devices with fin width from 10 to 40 nm with temperature decrease. • Excellent electrostatic coupling in all temperature range for devices with fin width of 10nm. In this work, an experimental characterization of SOI junctionless nanowire transistors operating in liquid helium temperature is conducted. DC measurements are performed in a temperature range from 300 K down to 4.2 K in devices with variable geometrical dimensions, namely the gate length and the fin width. Different electrical parameters are analyzed, such as the threshold voltage, the subthreshold slope, the low-field mobility, and the drain-induced barrier lowering (DIBL). The temperature reduction helps partially suppress short-channel effects, leading to improvement in these parameters while preserving good electrostatic control, even for highly scaled channel lengths.