Solder Void Impact on Power Device Thermal Impedance using Transient Thermal Analysis

This research explores the relationship between die-attach solder voids and the thermal impedance of high-power semiconductor packages. This is accomplished through an adapted transient system analysis technique, which aims to reduce the impact of extraneous variables in the thermal pathway. Using this method, it is shown that for 25 sample packages the thermal impedance measured at 7 ms has a high linear correlation with the void percentage (r-squared of 0.884), but that the voids alone contribute a relatively small proportion to the total thermal resistance of the package. In addition, the degradation of the solder layer is also observed through power cycling, where it was found that an increase of the void percentage from 3.8% to 20.5% cut the lifetime in half. These results are used to suggest that the main impact of voids is on the reliability of the module, rather than on the thermal performance.