Data Frame Encryption and Decryption System of SM4-CBC on ZYNQ

In the information age of rapid development in artificial intelligence and the Internet of Things, various devices continuously generate and exchange massive amounts of data. Behind this data explosion lies security risks. The SM4 algorithm, issued by the Chinese National Cryptography Administration, is a block encryption algorithm that can provide security for IoT-based networks. The standard SM4 algorithm has problems such as poor scalability and low implementation efficiency, and needs to be optimized for energy saving and reducing implementation area. Therefore, exploring the implementation of SM4 on hardware-constrained devices is crucial. In this work, we adopt a loop architecture and collaborative work between the processing system (PS) and programmable logic (PL) to reduce the resource usage of SM4-CBC, enhance algorithm security, and employ a ping-pong approach between two encryption modules to increase data throughput. Finally, Ethernet is the data transmission channel to achieve high-speed and reliable data communication.

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Publication Details

Published
2025-03-14
DOI
https://doi.org/10.1109/itoec63606.2025.10968248
Primary Topic
Embedded Systems and FPGA Design
Type
article
Field-Weighted Citation Impact
0.00

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article

Data Frame Encryption and Decryption System of SM4-CBC on ZYNQ

Yongyang Cheng, Xiang Zhao, Chengxiao Yu, Kang Liu et al.
Embedded Systems and FPGA Design
article

Data Frame Encryption and Decryption System of SM4-CBC on ZYNQ

Yongyang Cheng, Xiang Zhao, Chengxiao Yu, Kang Liu, Ying Liu
article en

Abstract

In the information age of rapid development in artificial intelligence and the Internet of Things, various devices continuously generate and exchange massive amounts of data. Behind this data explosion lies security risks. The SM4 algorithm, issued by the Chinese National Cryptography Administration, is a block encryption algorithm that can provide security for IoT-based networks. The standard SM4 algorithm has problems such as poor scalability and low implementation efficiency, and needs to be optimized for energy saving and reducing implementation area. Therefore, exploring the implementation of SM4 on hardware-constrained devices is crucial. In this work, we adopt a loop architecture and collaborative work between the processing system (PS) and programmable logic (PL) to reduce the resource usage of SM4-CBC, enhance algorithm security, and employ a ping-pong approach between two encryption modules to increase data throughput. Finally, Ethernet is the data transmission channel to achieve high-speed and reliable data communication.

Beijing Jiaotong University (CN), Peng Cheng Laboratory (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 91%
Embedded Systems and FPGA Design
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