Multi-Chip Temperature Imbalance of SiC MOSFETs in MOSFET vs. Body-Diode Conduction

We use on-chip NTC thermistors to observe the impact of the operating condition on the thermal resistance and chip temperature distribution in a multi-chip SiC MOSFET power module. We find that operating in MOSFET or Body-Diode mode impacts both the thermal resistance and the chip temperature distribution. In one example, Body-Diode operation increases the minimum to maximum chip temperature imbalance from 14.5°C to 30.1°C for the same power dissipation in comparison to MOSFET operation. The junction-to-ambient thermal resistance is also estimated to be 5% higher when measured under Body-Diode operation. The paper describes the on-chip NTC thermistors and provides additional thermal data from various operating conditions.