Vertical Channel-All-Around (CAA) IGZO FET With Recessed Source/Drain Structure to Improve Contact Characteristics

We proposed recessed source/drain(S/D) structure for vertical channel-all-around (CAA) IGZO FET to introduce contact interlayer and improve its contact characteristics. The IZO interlayer introduced between S/D and IGZO helps to reduce the contact resistance, and boosting the performance of CAA IGZO FET. The fabricated CAA IGZO FETs with 8 nm IZO interlayer show an average I<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> @ V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub>+1V of 32.6 μA/μm, SS of 86 mV/dec, and V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> of - 0.06 V. The Schottky barrier height qϕB is extracted to be reduced from 170 meV to 65 meV by introducing the contact interlayer, which confirms the improvement of contact characteristics.

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Publication Details

Journal
IEEE Electron Device Letters
Published
2025-04-23
DOI
https://doi.org/10.1109/led.2025.3563839
Citations
7
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
5.11

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article

Vertical Channel-All-Around (CAA) IGZO FET With Recessed Source/Drain Structure to Improve Contact Characteristics

Xinlv Duan, Ke Hu, Congyan Lu, Shipeng Wang et al.
7 citations
IEEE Electron Device Letters
Advancements in Semiconductor Devices and Circuit Design
5.11
article

Vertical Channel-All-Around (CAA) IGZO FET With Recessed Source/Drain Structure to Improve Contact Characteristics

Xinlv Duan, Ke Hu, Congyan Lu, Shipeng Wang, Chuanke Chen, Weiwei Li, Qiaoling Tong, Wanming Wu, Di Geng, Yu Liu, Ling Li, Chunyu Zhang, Chen Gu, Kaiping Zhang, Shengjie Zhao, Yanjun Tang, Nianduan Lu, Yue Zhao, Jiebin Niu
article en
7 citations

Abstract

We proposed recessed source/drain(S/D) structure for vertical channel-all-around (CAA) IGZO FET to introduce contact interlayer and improve its contact characteristics. The IZO interlayer introduced between S/D and IGZO helps to reduce the contact resistance, and boosting the performance of CAA IGZO FET. The fabricated CAA IGZO FETs with 8 nm IZO interlayer show an average I<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> @ V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub>+1V of 32.6 μA/μm, SS of 86 mV/dec, and V<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> of - 0.06 V. The Schottky barrier height qϕB is extracted to be reduced from 170 meV to 65 meV by introducing the contact interlayer, which confirms the improvement of contact characteristics.

IEEE Electron Device LettersVol. 46(7)
Chinese Academy of Sciences (CN), Institute of Microelectronics (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 5%
Advancements in Semiconductor Devices and Circuit Design
5.11
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