Effective 10‐bit OLED driver IC with 11‐bit DAC, double capacitor‐coupled adder, and offset calibration for enhanced panel driving

Abstract In this paper, we propose an 11‐bit source driver IC optimized for high‐resolution OLED display driving. The proposed IC adopts a Double Capacitor Coupled Adder (DCCA) structure, which enables parallel execution of the sampling and driving stages, thereby improving temporal efficiency and response speed. Additionally, we introduce a novel Slew Rate Enhancement (SRE) structure that enables rapid response even in conditions with minimal input–output voltage differences, delivering performance well‐suited for high‐resolution display driving. An Offset Calibration circuit is included to minimize inter‐channel voltage discrepancies, ensuring high precision and consistent output performance. Experimental results demonstrate that the proposed IC achieves a short horizontal line time(H) of 2.0 μs and a slew rate of 9.9 V/μs. The differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.66 LSB and 0.98 LSB, respectively, and, after Offset Calibration, the maximum inter‐channel deviation of output voltage (DVO) is reduced to 2.43 mV.

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Publication Details

Journal
Journal of the Society for Information Display
Published
2025-04-21
DOI
https://doi.org/10.1002/jsid.2068
Citations
1
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.73
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article

Effective 10‐bit OLED driver IC with 11‐bit DAC, double capacitor‐coupled adder, and offset calibration for enhanced panel driving

Changwhan Kim, Minjae Lee, Se-Won Lee
1 citations
Journal of the Society for Information Display
Advancements in Semiconductor Devices and Circuit Design
0.73
article

Effective 10‐bit OLED driver IC with 11‐bit DAC, double capacitor‐coupled adder, and offset calibration for enhanced panel driving

Changwhan Kim, Minjae Lee, Se-Won Lee
article en
1 citations

Abstract

Abstract In this paper, we propose an 11‐bit source driver IC optimized for high‐resolution OLED display driving. The proposed IC adopts a Double Capacitor Coupled Adder (DCCA) structure, which enables parallel execution of the sampling and driving stages, thereby improving temporal efficiency and response speed. Additionally, we introduce a novel Slew Rate Enhancement (SRE) structure that enables rapid response even in conditions with minimal input–output voltage differences, delivering performance well‐suited for high‐resolution display driving. An Offset Calibration circuit is included to minimize inter‐channel voltage discrepancies, ensuring high precision and consistent output performance. Experimental results demonstrate that the proposed IC achieves a short horizontal line time(H) of 2.0 μs and a slew rate of 9.9 V/μs. The differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.66 LSB and 0.98 LSB, respectively, and, after Offset Calibration, the maximum inter‐channel deviation of output voltage (DVO) is reduced to 2.43 mV.

Journal of the Society for Information DisplayVol. 33(5)
Gwangju Institute of Science and Technology (KR), Humanpass (South Korea) (KR)
Openalex Percentile: Top 29%
Advancements in Semiconductor Devices and Circuit Design
0.73
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