Beyond design-rule test pattern coverage for low-K1 hotspot and process variability reduction

Despite the imminent production use of high-NA (0.55) EUV scanners, the semiconductor industry has significant interest in extending the resolution of 1.35NA 193nm DUV lithography and low-NA (0.33NA) EUV lithography for cost and existing toolset utilization reasons. Proposed methods for extending low-NA EUV resolution include materials (e.g., new mask and photoresist), improved process control and improved mask synthesis methods (e.g., to reduce hotspots caused by traditional process variation and stochastic variation). For improving mask synthesis methods a key requirement is better understanding the systematic and random components of process variation at and beyond the corners and boundaries of the design-process, design-RET and design-model limits. In this paper, we recommend and test extensions to traditional lithography model and correction test patterns in order to efficiently improve the collection of reliable and meaningful process variation data with contour based metrology, at design-process/RET/model boundaries and beyond-design rule parameterized and random test patterns. We show that although these test pattern extensions are straightforward to define, generate, measure and use; they are valuable to improve the understanding of process variability at lithography printability limits.