FPGA-Based Low-Power High-Performance CNN Accelerator Integrating DIST for Rice Leaf Disease Classification

Agricultural pest and disease monitoring has recently become a crucial aspect of modern agriculture. Toward this end, this study investigates methodologies for implementing low-power, high-performance convolutional neural networks (CNNs) on agricultural edge detection devices. Recognizing the potential of field-programmable gate arrays (FPGAs) to enhance inference parallelism, we leveraged their computational capabilities and intensive storage to propose an embedded FPGA-based CNN accelerator design aimed at optimizing rice leaf disease image classification. Additionally, we trained the MobileNetV2 network using multimodal image data and employed knowledge distillation from a stronger teacher (DIST) as the hardware benchmark. The solution was deployed on the ZYNQ-AC7Z020 hardware platform using High-Level Synthesis (HLS) design tools. Through a combination of fine-grained pipelining, matrix blocking, and linear buffering optimizations, the proposed system achieved a power consumption of 3.21 W, an accuracy of 97.41%, and an inference speed of 43 ms per frame, making it a practical solution for edge-based rice leaf disease classification.