Plasma etching processes challenges for advanced non-volatile memories

The impressive growth of the non-volatile memories market has been driven by successive memory revolutions and supported by new applications enabling sales to increase exponentially. This deluge of data is accompanied by a constant improvement in memory technologies using new switching mechanisms. Among these technologies, the patterning of Phase-Change Random Access Memory (PCRAM) and Ferroelectric Random Access Memory (FeRAM) raises many challenges. The primary focus will be on the development of etching and stripping processes in terms of downscaling, profile control and plasma-induced damage of feature sidewalls. The etching process optimization and innovative solutions to minimize plasma-induced damage will also be presented and discussed in terms of plasma-surface interaction.

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Published
2025-04-22
DOI
https://doi.org/10.1117/12.3056135
Primary Topic
Semiconductor materials and devices
Type
article
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article

Plasma etching processes challenges for advanced non-volatile memories

P. Gouraud, T. Chevolleau, Veronique J. Michaud, Benjamin Fontaine et al.
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Semiconductor materials and devices
article

Plasma etching processes challenges for advanced non-volatile memories

P. Gouraud, T. Chevolleau, Veronique J. Michaud, Benjamin Fontaine, Christelle Boixaderas, G. Bourgeois, L. Grenouillet, Jérôme Dubois, Gabriele Navarro, Nicolas Posseme
article en

Abstract

The impressive growth of the non-volatile memories market has been driven by successive memory revolutions and supported by new applications enabling sales to increase exponentially. This deluge of data is accompanied by a constant improvement in memory technologies using new switching mechanisms. Among these technologies, the patterning of Phase-Change Random Access Memory (PCRAM) and Ferroelectric Random Access Memory (FeRAM) raises many challenges. The primary focus will be on the development of etching and stripping processes in terms of downscaling, profile control and plasma-induced damage of feature sidewalls. The etching process optimization and innovative solutions to minimize plasma-induced damage will also be presented and discussed in terms of plasma-surface interaction.

Commissariat à l'Énergie Atomique et aux Énergies Alternatives (FR), CEA Grenoble (FR), STMicroelectronics (France) (FR), Laboratoire d'Électronique des Technologies de l'Information (FR), Université Grenoble Alpes (FR)
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Semiconductor materials and devices
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Plasma etching processes challenges for advanced non-volatile memories — P. Gouraud, T. Chevolleau, et al. · (2025) | TGRS Research Map | TGRS