Breaking down ADI line edge roughness from a DUV scanner into components
Further shrink of device pitches requires a balanced Edge Placement Error (EPE) budget. A major contributor to the EPE budget are local effects. In ArFi critical use cases, these local effects are best quantified by the parameter Line Edge Roughness (LER). In this paper, we present a generic methodology to quantify and breakdown the LER measured at ADI into components. This helps to identify the major contributors and supports predicting the value of improvements. Here, we demonstrate our concept on an ArFi DRAM layer. However, the methodology is universal and applicable to other use cases such as EUV LCDU.
Authors
- T. van Hemert
- Brian M. Watson (ORCID: https://orcid.org/0000-0001-5151-0471)
- Jan Biller
- William L. Henstrom
- Anita Bouma
- Federica Riva
- Christian Scholz (ORCID: https://orcid.org/0000-0001-6719-9454)
- Mycahya Eggleston
- Vineet Vijayakrishnan Nair (ORCID: https://orcid.org/0000-0002-8970-2425)
- Vlad Temchenko
- Ranjan Khurana
- Guillaume Mernier
- Ted L. Taylor
- C. Perkins (ORCID: https://orcid.org/0000-0002-4573-4580)
- Stephen Snyder
- Jette van den Broeke
Institutions
- Micron (United States) (US)
- ASML (Netherlands) (NL)
Publication Details
- Published
- 2025-04-22
- DOI
- https://doi.org/10.1117/12.3051541
- Primary Topic
- Advancements in Photolithography Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00