Digital lithography

A new era of extending Moore’s Law now begins with how best to enable Advanced Packaging manufacturing. Unlike frontend lithography on CMP wafers with super flatness, chiplet manufacturing requires a lithography tool that meets CDU, overlay, and throughput requirements under challenging substrate conditions. For instance, die displacement during pick-and-place increases overlay errors if uncorrected, and substrate warpage induces lateral pattern distortion, further degrading overlay performance. A production-worthy lithography tool for advanced packaging must address these challenges with high throughput while assuring a chiplet manufacturing roadmap scaling. Applied Materials has developed revolutionary Digital Lithography Technologies (DLT) for both wafer-level and panel-level packaging. Its proprietary Digital Dynamic Connection (DDC) and Unit Alignment technologies correct for die displacement and warpage-induced pattern distortion. The maskless nature of DLT eliminates the reticle-stitching problem when printing large AI packages. Additionally, a high-performance platform can process four wafers simultaneously, quadrupling throughput. With a roadmap extending to 0.5µm and below, DLT is well-positioned to support Advanced Packaging now and into the sub-micron regime.