Advancing semiconductor patterning with EUV hyper NA: opportunities and challenges

Enhanced chip performance and miniaturization in the semiconductor industry are driven by improved lithographic capabilities, such as those of lithography systems with larger Numerical Aperture (NA). The emerging high NA Extreme Ultra Violet (EUV) lithography scanners increase the NA from 0.33 to 0.55, enabling continued shrink down to 8 nm half-pitch for lines/spaces. EUV systems with NA ≥ 0.75 (hyper NA) are being explored to support further cost-effective increases in device density. Our study demonstrates that hyper NA enables pattern shrink in advanced logic node designs projected in semiconductor roadmaps beyond 2030. However, the larger NA presents unique challenges, including enhanced mask-3D effects and reduced Depth of Focus at the wafer level. We address these challenges by focusing on imaging performance and the concerted efforts required by the lithography ecosystem.

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Publication Details

Published
2025-04-22
DOI
https://doi.org/10.1117/12.3050509
Citations
3
Primary Topic
Advancements in Photolithography Techniques
Type
article
Field-Weighted Citation Impact
2.19
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article

Advancing semiconductor patterning with EUV hyper NA: opportunities and challenges

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3 citations
Advancements in Photolithography Techniques
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article

Advancing semiconductor patterning with EUV hyper NA: opportunities and challenges

Gerardo Bottiglieri, Pieter Wöltgens, Heiko Feldmann, Bram Slachter, Sander Blok, Jan van Schoot, Mark van de Kerkhof, Reinier van der Meer, Michael Patra, Jens Timo Neumann, John McNamara
article en
3 citations

Abstract

Enhanced chip performance and miniaturization in the semiconductor industry are driven by improved lithographic capabilities, such as those of lithography systems with larger Numerical Aperture (NA). The emerging high NA Extreme Ultra Violet (EUV) lithography scanners increase the NA from 0.33 to 0.55, enabling continued shrink down to 8 nm half-pitch for lines/spaces. EUV systems with NA ≥ 0.75 (hyper NA) are being explored to support further cost-effective increases in device density. Our study demonstrates that hyper NA enables pattern shrink in advanced logic node designs projected in semiconductor roadmaps beyond 2030. However, the larger NA presents unique challenges, including enhanced mask-3D effects and reduced Depth of Focus at the wafer level. We address these challenges by focusing on imaging performance and the concerted efforts required by the lithography ecosystem.

Openalex Percentile: Top 13%
Advancements in Photolithography Techniques
2.19
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Advancing semiconductor patterning with EUV hyper NA: opportunities and challenges — Gerardo Bottiglieri, Pieter Wöltgens, et al. · (2025) | TGRS Research Map | TGRS