Influence of wafer topography on focus control and defectivity in EUV lithography

Reducing the imaging wavelength () and increasing the numerical aperture (NA) continues to enable the scaling of feature dimensions. With this trend, the usable Depth of Focus (DoF) is also expected to decrease according to the 2nd Rayleigh equation. Lithography DoF has remained stable for the past two decades with immersion lithography and multiple patterning. However, with the introduction of EUV lithography, the wavelength reduction has been offset by the large decrease in NA. High NA EUV lithography, utilizing the same wavelength as EUV, increases NA leading to smaller DoF and greater attention on focus control. A critical consideration is that focus not only impacts CD control, but also defectivity and pattern placement. Unlike short loop wafers, device wafers typically have residual topography from previous layer processing. Although chemical mechanical polishing (CMP) steps help mitigate this topography, residual topography often remains present at a higher frequency than can be fully corrected by the scanner. In this paper, we explore the effects of wafer topography by introducing programmed height differences in an underlying layer. We prepared multiple wafers where the topography pattern was transferred into oxide layers of varying thickness, resulting in different topography step levels. On these topographies, random logic patterns were printed at 32 nm design rule pitch using low NA EUV lithography. Metrology structures, densely placed across the field, were used to measure the focus offset. By correlating print quality with nominal topography, we investigate how these topographical variations impact the defectivity of the logic patterns. Our findings provide critical insights into the relationship between wafer topography and focus control, highlighting the need for advanced focus monitoring techniques in the era of high-NA EUV lithography.