Vario: enhance pattern diversity with diffusion model

Generation of VLSI layout patterns is essential for a wide range of Design For Manufacturability (DFM) studies. In this work, we introduce Vario, an automated, diffusion model-based framework that efficiently generates synthetic layout patterns without human intervention. The proposed method requires a set of starter layout patterns for training and produces diverse and novel designs. Our method achieves a Design Rule Check (DRC) pass rate of approximately 60%, significantly improving over prior approaches. Additionally, Vario enables controlled variation generation, facilitating targeted design space exploration and expanding the boundaries of known pattern spaces. We validate our approach on Intel’s cutting-edge 18A process node, demonstrating its effectiveness in synthetic pattern generation for advanced semiconductor manufacturing.