Design technology co-optimization for early intercept on maturing process nodes

In this paper, we describe a novel design-technology co-optimization methodology to support yield-sensitive design optimizations in parallel with process defect learning. This work enables the simultaneous early start of multiple designs in parallel with process development and provides significant immunity to design convergence from the changes in yield maturity. It must be noted that yield-sensitive design optimizations can be deployed when the systematic defects have been primarily addressed and the defect density is in the single digits. Previously, [1] described a method to bias design area by a measure of cell yield. We believe our work is the first to attempt to holistically improve design yield through the entire design creation flow. The results presented in this work are from applying this co-optimization methodology on early cell-based networking digital designs in a 4nm class technology [2]; however, the methods are general enough to be applied to any process node.