Power Estimation at Early Stage of the Real Time SoC
Power consumption is a critical factor in the VLSI industry as it affects the efficiency and reliability of circuits. Early power estimation is essential for reducing power consumption and efficiently using resources. It is also necessary for design exploration in the initial stages of circuit design. System-on-chip (SoC) design typically reuses low-level information about circuit components and structure, making early power estimation a requirement. Accurate power modeling and estimation can be achieved using Python scripting. This research proposes a high-level power estimation technique based on digital blocks that can estimate power consumption based on control and input signal characteristics. The proposed technique can help designers make informed decisions about power optimization early in the design phase. The technique can also be used to evaluate the power consumption of specific digital circuits. The proposed technique can potentially reduce power consumption and improve the reliability of VLSI circuits.
Authors
- S. Kamatchi
- Praveen Jaraut (ORCID: https://orcid.org/0000-0002-2646-8424)
- K R Suchitha
Institutions
- Amrita Vishwa Vidyapeetham (IN)
Publication Details
- Published
- 2024-12-20
- DOI
- https://doi.org/10.1109/emergin63207.2024.10960903
- Citations
- 1
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.49