A Fault-Tolerant Multilevel Inverter Topology Configured with Three Sources with Improved Performance in Post-Fault Conditions
This paper presents a novel topology for fault-tolerant multilevel inverters featuring three sources with improved performance in post-fault conditions. The conventional three-source topology has a total of eight switches, and anyone switch's failure severely impacts output voltage and harmonics. A fault analysis has been carried out for the conventional three-source topology, which has led to the development of a novel fault-tolerant MLI. For the proposed fault-tolerant topology, the number of levels and output voltage improve in the post-fault conditions for different modes of operation. For the proposed topology, a detailed fault analysis, along with the power quality assessment that has been carried out for open-circuit faults to every switch, has been provided in this paper. Finally, the simulation results have been provided to validate the proposed topology.
Authors
- Marif Daula Siddique (ORCID: https://orcid.org/0000-0002-0799-500X)
- Mehdi Seyedmahmoudian (ORCID: https://orcid.org/0000-0002-2538-4077)
- Saad Mekhilef (ORCID: https://orcid.org/0000-0001-8544-8995)
- Alex Stoicevski
Institutions
- Swinburne University of Technology (AU)
Publication Details
- Published
- 2024-12-18
- DOI
- https://doi.org/10.1109/pedes61459.2024.10960968
- Primary Topic
- Multilevel Inverters and Converters
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Swinburne University of Technology