Development of FPGA-based Interface Card for Power Electronic Converter Control

Multilevel topologies, back-to-back converter systems, solid-state transformers, etc., require many analogue signals for their control. To implement digital control in these systems, a custom interface circuit for digital processors needs to be developed. This paper presents a systematic design and development of an interface card for the digital control of such power elec-tronic converters. The proposed design consists of two daughter cards (signal conditioning card and analogue-to-digital converter (ADC) card) connected to Zedboard development board. An ADC driver is developed and discussed as a state machine. A total of 40 analogue signal intakes is provided, along with 40 general-purpose input/output (GPIO) pins and communication features like serial peripheral interface (SPI), campus area network (CAN), and universal asynchronous receiver/transmitter (UART). The ADC card printed circuit board (PCB) is simulated in Ansys SIwave for direct current internal resistance (DCIR) analysis. The signal conditioning circuit is analysed with a frequency response that considers the circuit parasitic. Lastly, hardware results are showcased, verifying the proposed solution.

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Publication Details

Published
2024-12-18
DOI
https://doi.org/10.1109/pedes61459.2024.10961021
Primary Topic
Embedded Systems and FPGA Design
Type
article
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article

Development of FPGA-based Interface Card for Power Electronic Converter Control

Hitesh Malviya, Chandan Kumar
Embedded Systems and FPGA Design
article

Development of FPGA-based Interface Card for Power Electronic Converter Control

Hitesh Malviya, Chandan Kumar
article en

Abstract

Multilevel topologies, back-to-back converter systems, solid-state transformers, etc., require many analogue signals for their control. To implement digital control in these systems, a custom interface circuit for digital processors needs to be developed. This paper presents a systematic design and development of an interface card for the digital control of such power elec-tronic converters. The proposed design consists of two daughter cards (signal conditioning card and analogue-to-digital converter (ADC) card) connected to Zedboard development board. An ADC driver is developed and discussed as a state machine. A total of 40 analogue signal intakes is provided, along with 40 general-purpose input/output (GPIO) pins and communication features like serial peripheral interface (SPI), campus area network (CAN), and universal asynchronous receiver/transmitter (UART). The ADC card printed circuit board (PCB) is simulated in Ansys SIwave for direct current internal resistance (DCIR) analysis. The signal conditioning circuit is analysed with a frequency response that considers the circuit parasitic. Lastly, hardware results are showcased, verifying the proposed solution.

Indian Institute of Technology Guwahati (IN)
Affordable and clean energy
Openalex Percentile: Top 63%
Embedded Systems and FPGA Design
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