Optimizing DC-Link Capacitor Size in Ten-Switch Neutral Point Clamped Converter

The paper presents a new modulation strategy for reducing the DC-Link capacitor size in ten-switch neutral point clamped converters (TS-NPCs). The TS-NPC, like the NPC, has a split DC-link but uses only ten switches rather than twelve. Low-frequency oscillations at three times the fundamental frequency is also present because of load current flowing through the neutral point (NP) during TS-NPC operation. The low-frequency capacitor voltage ripple in the DC-link is not addressed by the TS-NPC modulations currently available in the literature. Therefore, the DC link capacitors are sized to reduce the effect of voltage deviation due to this large third harmonic NP current. Furthermore, the multiplexed nature of the DC link causes TS-NPC to produce fewer switching states than NPC. In contrast to the existing modulations for TS-NPC, the proposed modulation guarantees the zero average NP current in each switching cycle and thereby eliminates the effect of low-frequency oscillations in the capacitors' voltages. This will enable the use of smaller DC-Link capacitors resulting in more compact passive components and high-power dense designs. Simulation results and comparisons with existing methods are provided to validate the proposed strategy to optimize the DC-Link capacitors size.

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Publication Details

Published
2024-12-18
DOI
https://doi.org/10.1109/pedes61459.2024.10961738
Primary Topic
Multilevel Inverters and Converters
Type
article
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article

Optimizing DC-Link Capacitor Size in Ten-Switch Neutral Point Clamped Converter

A Narendrababu, Pradyumn Chaturvedi
Multilevel Inverters and Converters
article

Optimizing DC-Link Capacitor Size in Ten-Switch Neutral Point Clamped Converter

A Narendrababu, Pradyumn Chaturvedi
article en

Abstract

The paper presents a new modulation strategy for reducing the DC-Link capacitor size in ten-switch neutral point clamped converters (TS-NPCs). The TS-NPC, like the NPC, has a split DC-link but uses only ten switches rather than twelve. Low-frequency oscillations at three times the fundamental frequency is also present because of load current flowing through the neutral point (NP) during TS-NPC operation. The low-frequency capacitor voltage ripple in the DC-link is not addressed by the TS-NPC modulations currently available in the literature. Therefore, the DC link capacitors are sized to reduce the effect of voltage deviation due to this large third harmonic NP current. Furthermore, the multiplexed nature of the DC link causes TS-NPC to produce fewer switching states than NPC. In contrast to the existing modulations for TS-NPC, the proposed modulation guarantees the zero average NP current in each switching cycle and thereby eliminates the effect of low-frequency oscillations in the capacitors' voltages. This will enable the use of smaller DC-Link capacitors resulting in more compact passive components and high-power dense designs. Simulation results and comparisons with existing methods are provided to validate the proposed strategy to optimize the DC-Link capacitors size.

Visvesvaraya National Institute of Technology (IN)
Affordable and clean energy
Openalex Percentile: Top 73%
Multilevel Inverters and Converters
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Optimizing DC-Link Capacitor Size in Ten-Switch Neutral Point Clamped Converter — A Narendrababu, Pradyumn Chaturvedi · (2024) | TGRS Research Map | TGRS