Performance Optimization of FCL in DC Microgrid using Meta Heuristic Techniques

The primary objective of this study is to simplify the complex model of a looped-type DCMG and conduct an indepth analysis to derive expressions for currents in the switching devices, specifically insulated-gate bipolar transistors (IGBTs), following the occurrence of faults. Additionally, the work aims to develop an optimization model for FCL placement. This model considers a multi objective function optimization goal involving the fault current as well as the inductance value. The optimization model that has been simulated using PSCAD operates within the constraints of resistance and inductance values of the FCL, while ensuring a balance between protective measures and operational efficacy within the DCMG.