An Interchip Communication Method Suitable for Neuromorphic Chips by Detecting Data Stability

The sparsity of spike generation in neuromorphic computing establishes asynchronous communication as inherently more suited than SERializer/DESerializer (SerDes) for handling sparse inter-chip transmissions. However, traditional asynchronous methods often require more wires than the data bit width due to data encoding schemes. This paper introduces a novel method, Detecting Data Stable Receiver-Transmitter (D2SRT), for inter-chip communication in neuromorphic chips. By detecting data stability, D2SRT achieves low power and high performance, with a single-bit energy consumption of 13.9pJ and throughput of 217.2Mbps, surpassing traditional methods. Experimental results show that D2SRT meets the bandwidth requirements for most Spiking Neural Networks (SNNs) and achieves exceptionally low dynamic power consumption.