Reduced Power Processing High Efficient LED Driver
In this paper, a circuit for a single-stage active LED driver with continuous current output, minimal power processing, and power factor adjustment is presented. The main goal is to incorporate power factor correction and consistent current output–two features usually found in two–stage driver solutions-into a single-stage design. Crucially, the circuit distributes input power efficiently without the need for extra switches. It makes use of a straightforward ripple cancellation control mechanism to properly align DC power and AC ripple power. This enables the use of longer-lasting film capacitors instead of typical electrolytic capacitors, extending the LED driver's operational life. In addition, the design reduces power processing by processing a small portion of the input power twice instead of the full input power as is the case with traditional twostage driver circuits. This article examines the configuration of a single input, dual-output power factor correction converter. A 30W simulation model has been carefully developed using PSIM, and the findings have been carefully confirmed.
Authors
- Ramesh Babu Pallapati (ORCID: https://orcid.org/0000-0003-1702-2145)
- Ramulu Chinthamalla (ORCID: https://orcid.org/0000-0002-3391-5528)
- Hayder S. Mohammed
- Sai Rohit Chikatimarla
Institutions
- National Institute of Technology Warangal (IN)
Publication Details
- Published
- 2024-12-18
- DOI
- https://doi.org/10.1109/pedes61459.2024.10961485
- Citations
- 1
- Primary Topic
- Embedded Systems and FPGA Design
- Type
- article
- Field-Weighted Citation Impact
- 0.33