Reconfigured Series Stacked Energy Buffer (SSB) for Voltage Drop Compensation
To decouple the second harmonic pulsation for single phase DC to AC (AC to DC) conversion, an Active power filter (APF) helps to execute the task with a smaller capacitance. Series Stacked Buffer is the latest APF. This topology has a practical issue of fall in voltage of supporting capacitor for SSB converter losses. Usually, this loss is compensated by introducing a small voltage ripple in DC bus voltage. This paper presents a technique for compensating voltage drop in an SSB, using a modified arrangement. The structure is designed to extract the necessary loss compensation from the DC bus using a simple buck converter, without any intentional ripple injection in DC bus voltage. The switches are configured so that the number of components does not increase. Due to the smaller and discontinuous inductor current, a smaller size additional inductor for the buck compensator circuit does not lead to an increase in the overall size. The paper discusses the detailed structure and control strategy of the proposed configuration.
Authors
- Santosh Kumar Singh (ORCID: https://orcid.org/0000-0003-3104-1975)
- Saprativ Saha (ORCID: https://orcid.org/0009-0009-0230-8336)
Institutions
- Indian Institute of Technology BHU (IN)
- Banaras Hindu University (IN)
Publication Details
- Published
- 2024-12-18
- DOI
- https://doi.org/10.1109/pedes61459.2024.10961167
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.00