A 56-Gb/s DAC/ADC-Based Multicarrier Transceiver With TX Polar DSP and RX MIMO-DSP for >40-dB Loss Channel
This article presents a DAC/ADC based multicarrier transceiver fabricated in a 22-nm FinFET technology. The multicarrier signaling scheme utilizes orthogonally spaced carriers for spectral efficient band spacing and exhibit jitter robustness compared to conventional baseband pulse amplitude based signaling. The transmitter has a polar DSP to generate the equalized codes driving the 7b phase DACs, and 7b amplitude DACs with 2b predistortion to yield 1.2Vppd swing. The multicarrier receiver front-end ADC outputs are equalized with a MIMO DSP backend to compensate for the inter-symbol interference and inter-channel interference. The measured transceiver at 56Gb/s through a 40.8dB loss at 14GHz channel showed a jitter tolerance of up to 1.21psrms at BER<10-4 with 7.82pJ/bit power efficiency.
Authors
- Sebastián Hoyos (ORCID: https://orcid.org/0000-0002-2691-3700)
- Samuel Palermo (ORCID: https://orcid.org/0000-0002-6555-1474)
- Yuanming Zhu (ORCID: https://orcid.org/0000-0001-7731-4452)
- Srujan Kumar Kaile (ORCID: https://orcid.org/0000-0003-2265-0496)
- Julian Camilo Gomez Diaz (ORCID: https://orcid.org/0000-0002-8340-4953)
- Il-Min Yi (ORCID: https://orcid.org/0000-0002-6505-1138)
- Tong Liu (ORCID: https://orcid.org/0000-0003-0551-8135)
Institutions
- Analog Devices (United States) (US)
- Gwangju Institute of Science and Technology (KR)
- Texas A&M University (US)
Publication Details
- Journal
- IEEE Solid-State Circuits Letters
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1109/lssc.2025.3562615
- Citations
- 1
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.73
Funders
- National Science Foundation
- Semiconductor Research Corporation