Impact of Dielectric Insulation and Protection Layers on 233 nm Far-UVC LEDs

This paper investigates the effect of dielectric insulation or protection layers such as SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and SiN<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> on the performance and reliability of 233 nm far-UVC LEDs. The study includes the effect of n-contact annealing of chips with these layers. Results show that introducing a protection of the p-GaN surface and mesa edges by SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and combining it with an insulation by SiN<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> enhances the device performance. LEDs with a SiO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> protection layer that undergoes an n-contact annealing at 700 °C offer minimum leakage and degradation.