Design of Low-Power Priority Encoder Using Different VLSI Design Styles for Full-Swing

This document introduces the design of a low- power priority encoder using various VLSI design styles for full swing. Priority encoder is essential in digital systems for encoding multiple inputs into a binary representation based on their priority. In this work, we explore different VLSI design styles including with standard complementary metal-oxide semi-conductor (CMOS), transmission-gate- logic (TGL). Targeting on to achieve low power consumption by reducing the transistor count and also maintaining good performance and reliability. The priority encoder is designed to operate at full swing, ensuring compatibility with standard digital logic families. We employ efficient transistor sizing, gate level optimization techniques, and power-gating strategies to minimize power consumption without compromising functionality.