Research on Elliptic Curve Cryptography Hardware Encryption System Based on FPGA

This paper presents a hardware encryption system based on FPGA (Field-Programmable Gate Array) implementing the elliptic curve cryptography algorithm.Using FPGA as the core control unit, IoT (Internet of Things) data transmission terminals are connected to FPGA-specific external interfaces via USB/SPI interfaces.Data collected into the FPGA undergoes encryption and decryption using the FPGA's internal hardware resources.The encrypted data is then converted into TCP/IP protocol packets and transmitted to a cloud server through the FPGA's internal Ethernet interface circuit module.A detailed analysis and design of the hardware implementation of the elliptic curve encryption algorithm are provided.Simulation validation of the point multiplication algorithm was conducted on a computer platform with a quad-core 3.2GHz processor and 8GB of memory, using the Xilinx 5vlx20tff323 chip.The simulation results indicate that the maximum execution frequency reached 372.686MHz, with a single point multiplication operation completed in 3328 s .This significantly enhances the processing speed of the algorithm, bearing significant theoretical value and practical implications for advancing the security of the IoT ecosystem.

Publication Details

Journal
Journal of Combinatorial Mathematics and Combinatorial Computing
Published
2025-04-16
DOI
https://doi.org/10.61091/jcmcc127b-085
Primary Topic
Cryptography and Residue Arithmetic
Type
article
Field-Weighted Citation Impact
0.00

Funders

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article

Research on Elliptic Curve Cryptography Hardware Encryption System Based on FPGA

Journal of Combinatorial Mathematics and Combinatorial Computing
Cryptography and Residue Arithmetic
article

Research on Elliptic Curve Cryptography Hardware Encryption System Based on FPGA

article en

Abstract

This paper presents a hardware encryption system based on FPGA (Field-Programmable Gate Array) implementing the elliptic curve cryptography algorithm.Using FPGA as the core control unit, IoT (Internet of Things) data transmission terminals are connected to FPGA-specific external interfaces via USB/SPI interfaces.Data collected into the FPGA undergoes encryption and decryption using the FPGA's internal hardware resources.The encrypted data is then converted into TCP/IP protocol packets and transmitted to a cloud server through the FPGA's internal Ethernet interface circuit module.A detailed analysis and design of the hardware implementation of the elliptic curve encryption algorithm are provided.Simulation validation of the point multiplication algorithm was conducted on a computer platform with a quad-core 3.2GHz processor and 8GB of memory, using the Xilinx 5vlx20tff323 chip.The simulation results indicate that the maximum execution frequency reached 372.686MHz, with a single point multiplication operation completed in 3328 s .This significantly enhances the processing speed of the algorithm, bearing significant theoretical value and practical implications for advancing the security of the IoT ecosystem.

Journal of Combinatorial Mathematics and Combinatorial ComputingVol. 127b
Anhui University
Openalex Percentile: Top 90%
Cryptography and Residue Arithmetic
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