An efficient low-power configured dual material gate-all-around nanotube TFET with hetero-dielectric layers

Abstract In the field of semiconductors, Tunnel Field-Effect Transistors (TFETs) stand out as highly efficient electronic devices. The ability of nanotubes to form a Gate-All-Around (GAA) structure provides excellent electrostatic control, making them ideal for addressing critical challenges such as short-channel effects and power dissipation in nanoscale devices. This research introduces a hetero-dielectric dual-material design for TFETs, utilizing HfO 2 and Al 2 O 3 to enhance device performance. The proposed model employs the Band-to-Band Tunneling (BTBT) mechanism, while the use of HfO 2 and Al 2 O 3 reduces leakage current. Additionally, incorporating a dual-material gate-all-around structure in the nanotube TFET significantly boosts the drain current. Optimal work functions for the gate materials on the source and drain sides further enhance the device’s performance. The dual-material gate configuration improves the overall efficiency of the double-gate TFET. Key electrical parameters, including current–voltage (I–V) characteristics, transconductance (s/μm), transfer characteristics, mobility (cm 2 /V·s), drain current (A/μm), capacitance (F/μm), and average subthreshold slope (mV/dec), were analyzed to evaluate performance. Linearity metrics such as Gm1, Gm2, Gm3, VIP2, VIP3, IMD3, 1-dB compression point, and IIP3 were also assessed. The proposed design achieved a capacitance of 48 F μm −1 , a drain current of 25 A μm −1 , a transconductance of 456 s μm −1 , mobility of 1252 cm 2 V −1 ·s −1 , and an average subthreshold slope of 56 mV dec −1 . These results were compared with existing models, dielectric materials, and channel lengths. The simulation and modeling results highlight its potential for advanced low-power electronic applications, establishing it as a promising candidate for future semiconductor technologies.