Low-Loss MOS-Controllable Stored-Carrier Diode
We previously proposed a metal–oxide–semiconductor-controllable stored-carrier diode (MOSD) to break through the tradeoff between conduction loss and switching loss with a conventional p-n diode. The structure of this MOSD consists of an n-channel metal–oxide–semiconductor field-effect transistor (MOSFET) added to the anode region, which dynamically controls the stored-carrier density. The simulation results for this study indicated that the switching loss for our MOSD can be sufficiently reduced compared with that for a gate-controlled body diode in a MOSFET due to the deep p- layer completely covering the MOS gate. The narrow cell width and electron barrier layer (EBL), which are characteristics of our MOSD, also enhance the reducing effect of switching loss and forward voltage (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>F</i></sub>), respectively. To verify this concept, we fabricated a prototype 6.5-kV MOSD. This MOSD, driven by a high-conductivity insulated gate bipolar transistor (IGBT) with time and space control of stored carriers (TASC), demonstrated a lower switching loss of -43% and lower <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>F</i></sub><italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"/> of -1.0 V compared with those for a conventional p-n diode driven by a planar-gate IGBT.
Authors
- Tsubasa Moritsuka
- Masaki Shiraishi
- Takashi Hirao (ORCID: https://orcid.org/0000-0002-8738-5059)
- Mutsuhiro Mori
- Hiroshi Suzuki (ORCID: https://orcid.org/0000-0002-2674-7984)
- Tomoyasu Furukawa
- Tomoyuki Miyoshi (ORCID: https://orcid.org/0000-0001-6658-5679)
- Youichi Takada
Institutions
- Hitachi (Japan) (JP)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2025-04-18
- DOI
- https://doi.org/10.1109/ted.2025.3556110
- Citations
- 1
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.73