Aging of Insulated Metal Substrate Printed Circuit Boards Under High-Frequency Voltage Stress

High-end power conversion applications increasingly employ insulated metal substrate PCBs with very thin dielectrics to improve thermal performance. To ensure the reliability of these PCBs when exposed to high-frequency voltages, the breakdown and ageing mechanisms of the PCB laminates under high-frequency voltage stress must be understood. This paper investigates the breakdown and lifetime of these laminates using two high-frequency test sources for sinusoidal and square-wave voltages in the typical frequency range of 25-100 kHz and a test voltage up to 8 kV, which is a significant increase compared to existing literature. Diagnostic tests, such as partial discharge measurement and dielectric frequency response analysis, are performed to analyse the high-frequency ageing mechanisms further. Despite the rapid degradation of the insulation system under high-frequency voltage stresses, the results show that the IMS PCB laminates are quite robust, with high breakdown fields. The lifetime of the PCB laminates is found to vary approximately with the inverse of the frequency. Surface degradation due to the high inhomogeneous fields at the edges of the conducting planes is identified as one of the main lifetime risks. This is similar to more conventional PCB constructions. Diagnostic tests suggest that the accelerated degradation is due to highly localised partial discharge activity and electrical treeing.

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Publication Details

Journal
IEEE Transactions on Dielectrics and Electrical Insulation
Published
2025-04-18
DOI
https://doi.org/10.1109/tdei.2025.3562177
Primary Topic
Electromagnetic Compatibility and Noise Suppression
Type
article
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article

Aging of Insulated Metal Substrate Printed Circuit Boards Under High-Frequency Voltage Stress

Mohamad Ghaffarian Niasar, Gijs Willem Lagerweij
IEEE Transactions on Dielectrics and Electrical Insulation
Electromagnetic Compatibility and Noise Suppression
article

Aging of Insulated Metal Substrate Printed Circuit Boards Under High-Frequency Voltage Stress

Mohamad Ghaffarian Niasar, Gijs Willem Lagerweij
article en

Abstract

High-end power conversion applications increasingly employ insulated metal substrate PCBs with very thin dielectrics to improve thermal performance. To ensure the reliability of these PCBs when exposed to high-frequency voltages, the breakdown and ageing mechanisms of the PCB laminates under high-frequency voltage stress must be understood. This paper investigates the breakdown and lifetime of these laminates using two high-frequency test sources for sinusoidal and square-wave voltages in the typical frequency range of 25-100 kHz and a test voltage up to 8 kV, which is a significant increase compared to existing literature. Diagnostic tests, such as partial discharge measurement and dielectric frequency response analysis, are performed to analyse the high-frequency ageing mechanisms further. Despite the rapid degradation of the insulation system under high-frequency voltage stresses, the results show that the IMS PCB laminates are quite robust, with high breakdown fields. The lifetime of the PCB laminates is found to vary approximately with the inverse of the frequency. Surface degradation due to the high inhomogeneous fields at the edges of the conducting planes is identified as one of the main lifetime risks. This is similar to more conventional PCB constructions. Diagnostic tests suggest that the accelerated degradation is due to highly localised partial discharge activity and electrical treeing.

IEEE Transactions on Dielectrics and Electrical InsulationVol. 32(6)
Prodrive Technologies (Netherlands) (NL), Delft University of Technology (NL)
Affordable and clean energy
Openalex Percentile: Top 94%
Electromagnetic Compatibility and Noise Suppression
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Aging of Insulated Metal Substrate Printed Circuit Boards Under High-Frequency Voltage Stress — Mohamad Ghaffarian Niasar, Gijs Willem Lagerweij · IEEE Transactions on Dielectrics and Electrical Insulation (2025) | TGRS Research Map | TGRS